tmeissner
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usb-avr-cpld
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20 Commits (master)
 

Author SHA1 Message Date
  T. Meissner 5989b1a505 added gpl-v2 license text 13 years ago
  T. Meissner b8d183c04c declaration of F_CPU now in the makefile, only check in the c-source, if it was forgotten 13 years ago
  T. Meissner 0caa647603 change timespec name from TS_Clk_i to TS_XcClk_i 13 years ago
  T. Meissner cb4a735e25 wrapped gpio pin test code with a a synchronious process, sensitive to XcClk_i 13 years ago
  T. Meissner 1259f65032 bugfix: added 'NET' before the pin names 13 years ago
  T. Meissner 7c64b1f1e9 initial commit of config folder & makefile for implementation 13 years ago
  T. Meissner 4cf56d5299 added description of the 'cpld' which contains the cpld test design 13 years ago
  T. Meissner 8c3ed041a9 new folder 'cpld' with test project to test the CPLD on USB-AVR-CPLD 13 years ago
  T. Meissner 036068d3d2 added link to the avr folder 13 years ago
  T. Meissner 12c7b0aed0 added closing of the image tag 13 years ago
  T. Meissner 5636bc6680 initial commit of the project README file 13 years ago
  T. Meissner 05322a603a new folder 'avr' with test project to test the AVR on USB-AVR-CPLD 13 years ago
  T. Meissner c898a103ad initial commit of design rules for manufacturing the pcb at q-print 13 years ago
  T. Meissner e0e8b58a27 update to latest schematic & board revision, now version 0.1 which is 13 years ago
  T. Meissner 92866b785c This is the revision, that is manufactured at q-print, v.0.1 13 years ago
  T. Meissner 12db9fa3c9 version 0.1: update to major revision of layout 13 years ago
  T. Meissner fdfeac2d6c major revision of board layout 13 years ago
  T. Meissner 712e94bd21 added schematic picture 13 years ago
  T. Meissner d2b435f03b pics folder with some pictures & fotos of the project 13 years ago
  T. Meissner e02048de62 initial commit of eagle files with additional data 13 years ago