T. Meissner
5989b1a505
added gpl-v2 license text
8 years ago
T. Meissner
b8d183c04c
declaration of F_CPU now in the makefile, only check in the c-source, if it was forgotten
8 years ago
T. Meissner
0caa647603
change timespec name from TS_Clk_i to TS_XcClk_i
8 years ago
T. Meissner
cb4a735e25
wrapped gpio pin test code with a a synchronious process, sensitive to XcClk_i
8 years ago
T. Meissner
1259f65032
bugfix: added 'NET' before the pin names
8 years ago
T. Meissner
7c64b1f1e9
initial commit of config folder & makefile for implementation
8 years ago
T. Meissner
4cf56d5299
added description of the 'cpld' which contains the cpld test design
8 years ago
T. Meissner
8c3ed041a9
new folder 'cpld' with test project to test the CPLD on USB-AVR-CPLD
* sim/makefile with targets to simulate the cpld design
* sim/cpldtestt.vhd file with the testbench
* sim/cpldtestt.tcl file with control commands for gtkwave
* src/cpldteste.vhd file with test design (@ the moment a simple 10101 @ gpio port)
* syn/constraints/cpldtest.ucf with implementation constraints
* syn/makefile with targets to build the cpld design
8 years ago
T. Meissner
036068d3d2
added link to the avr folder
8 years ago
T. Meissner
12c7b0aed0
added closing of the image tag
8 years ago
T. Meissner
5636bc6680
initial commit of the project README file
* added short description
* a nice photo to see, what's all about
8 years ago
T. Meissner
05322a603a
new folder 'avr' with test project to test the AVR on USB-AVR-CPLD
* makefile with compile, program & clean targets
* src/avrtest.c file with test code (@ the moment a simple uart loop)
8 years ago
T. Meissner
c898a103ad
initial commit of design rules for manufacturing the pcb at q-print
8 years ago
T. Meissner
e0e8b58a27
update to latest schematic & board revision, now version 0.1 which is
manufactured at q-print :)
8 years ago
T. Meissner
92866b785c
This is the revision, that is manufactured at q-print, v.0.1
* integrated 32 Mbit SPI-Flash, connected to the CPLD
* The rx/tx leds are now powerd by VCCIO
* further layout optimisations
8 years ago
T. Meissner
12db9fa3c9
version 0.1: update to major revision of layout
8 years ago
T. Meissner
fdfeac2d6c
major revision of board layout
* better signal routing around ft232rl
* better placement of blockng capacitors
8 years ago
T. Meissner
712e94bd21
added schematic picture
8 years ago
T. Meissner
d2b435f03b
pics folder with some pictures & fotos of the project
8 years ago
T. Meissner
e02048de62
initial commit of eagle files with additional data
* design rules
* libraries
* schematic
* board
8 years ago