24 Commits (80fb3ed2bbbda4bec8f7d3440637260b074f0e03)

 

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Author	SHA1	Message	Date
T. Meissner	80fb3ed2bb	Add pyuvm as git submodule	11 months ago
T. Meissner	4a0c9dc42b	Merge pull request #1 from cmarqu/patch-1	3 years ago
Colin Marquardt	6609bfecc9	Typofixes	3 years ago
T. Meissner	6b884bf859	Remove call of env-setup.sh	3 years ago
T. Meissner	13c863eb5f	Increase number of tests; adjust const. random generation	3 years ago
T. Meissner	ec2b3b108b	Add presentation 'using python for verif. of dig. systems'	3 years ago
T. Meissner	201ac4c6c2	Use pypi version since wallento/cocotbext-wishbone#22 was fixed	3 years ago
T. Meissner	d032d83d63	Remove non-needed imports & ReadOnly() calls	3 years ago
T. Meissner	e79d6f2533	Add directory change in log	3 years ago
T. Meissner	d4437740d5	Add GTKwave tcl file for uarttx	3 years ago
T. Meissner	0fcdc7fbed	Incorporate latest additions & fixes	3 years ago
T. Meissner	7c3adb4be3	Beauty care	3 years ago
T. Meissner	d0a00d2619	Add --recursive in the log	3 years ago
T. Meissner	1ebfafd654	Switch to submodule repos instead of local clones	3 years ago
T. Meissner	92a387bf22	Added libvhdl & cryptocores as git submodules	3 years ago
T. Meissner	e13b23f27b	Add aes and condense log in readme	3 years ago
T. Meissner	3f97ee4f30	Add simple example verifying an aes unit	3 years ago
T. Meissner	f42ca7250a	Separate uart tx & rx tests into own testbenches	3 years ago
T. Meissner	c3ae295a11	Better formatting of sram monitor output log	3 years ago
T. Meissner	1c83d938ea	Sram monitor: Fix latching of address in read transaction; store binaryvalue objects instead of strings	3 years ago
T. Meissner	f656244c55	Add simple example verifying a wishbone slave	3 years ago
T. Meissner	3028207d24	Add docker setup step in quickstart section	3 years ago
T. Meissner	3f5d65993f	Add readme; outcomment installing wishbone extension	3 years ago
T. Meissner	f49a46399a	initial commit of 1st simple UART tests	3 years ago