tmeissner
/
cryptocores
1
0
Fork 0
Code Issues 0 Pull Requests 0 Releases 0 Wiki Activity
cryptography ip-cores in vhdl / verilog
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
222 Commits
1 Branch
1.7 MiB
 
 
 
 
 
Tree: 3de7dd63a9
Branches Tags
${ item.name }
Create branch ${ searchTerm }
from '3de7dd63a9'
${ noResults }
cryptocores/ctraes
T. Meissner 2a3fae594f Refactor conditions in counter process; add info about submodule update 4 years ago
..
rtl/vhdl Refactor conditions in counter process; add info about submodule update 4 years ago
sim/vhdl Fix CTR-init round, set of iv & key in 1st round only. 4 years ago
syn/vhdl Add more VHDL-synthesis Makefiles; use src of des instead of local copies; minor refactoring 4 years ago