Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
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T. Meissner 3b669b037b Add example for |-> (overlapping suffix implication) operator 5 years ago
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hex_sequencer.vhd Add 4-bit version of sequencer 5 years ago
pkg.vhd Add 4-bit version of sequencer 5 years ago
psl_always.vhd Handle ambiguous PLS/VHDL assert, add some hints 5 years ago
psl_before.vhd Minor fixes, beauty care 5 years ago
psl_eventually.vhd Minor fixes, beauty care 5 years ago
psl_logical_implication.vhd Add example for locical implication 5 years ago
psl_never.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
psl_next.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
psl_next_3.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago
psl_next_a.vhd Add some more waveforms & asserts to PSL next_a example 5 years ago
psl_next_e.vhd Add example for next_e operator 5 years ago
psl_next_event.vhd Add example for next_event operator 5 years ago
psl_next_event_4.vhd Add example for next_event[n] operator 5 years ago
psl_next_event_a.vhd Add more failing assertions (should hold, assuming GHDL bug) to next_event_a example 5 years ago
psl_next_event_e.vhd PSL next_event_e operator now supported by GHDL :) 5 years ago
psl_sere.vhd Add example for simple SERE 5 years ago
psl_sere_overlapping_suffix_impl.vhd Add example for |-> (overlapping suffix implication) operator 5 years ago
psl_until.vhd Add example of until & until_ operators 5 years ago
sequencer.vhd Add tests for formal verification; optimizations; fixes #3 5 years ago