cryptography ip-cores in vhdl / verilog
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T. Meissner 2d708cbb51 Minor update to TDES sim makefile and testbench 2 years ago
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rtl Add more VHDL-synthesis Makefiles; use src of des instead of local copies; minor refactoring 2 years ago
sim Minor update to TDES sim makefile and testbench 2 years ago
syn/vhdl Add more VHDL-synthesis Makefiles; use src of des instead of local copies; minor refactoring 2 years ago