 T. Meissner
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4c3bdca559
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add info for WishBone components & unit test
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10 years ago |
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T. Meissner
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f0e490142e
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moved register write into ADDRESS state, decreasing the write to one cycle only
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10 years ago |
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T. Meissner
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285a25132e
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react to slave ack in ADDRESS state
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10 years ago |
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T. Meissner
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9cac2cb72a
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add gitignore file
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10 years ago |
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T. Meissner
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500f41f4b7
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add init() procedure to t_list_queue type to configure the maximal depth of the linked-list queue
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10 years ago |
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T. Meissner
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dfa39921bb
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add forgotten vhdl2008 dependenciy to queuet target
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10 years ago |
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T. Meissner
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ad49871b88
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Merge branch 'master' of https://github.com/tmeissner/libvhdl
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10 years ago |
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T. Meissner
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7d60f0ae1b
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add simple wishbone master and slave with support of classic single write and read as specified in the wishbone spec b4; add unit tests for wishbone m,aster & slave
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10 years ago |
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T. Meissner
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b038131ccf
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add reset value for s_miso in SpiMasterE unit test
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10 years ago |
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T. Meissner
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c221b65074
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ste is now generated combinatoral in parallel to the fsm
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10 years ago |
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T. Meissner
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8369ba705e
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add tests for new direction generics/parameters
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10 years ago |
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T. Meissner
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9a38916108
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add dir parameter to spi_* procedures to configure direction of data transmission (MSB->LSB and vice versa)
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10 years ago |
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T. Meissner
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5c06158fac
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add generic G_DATA_DIR to set if we want transfer from LSB to MSB ore vice versa
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10 years ago |
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T. Meissner
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8f2c3f5cd5
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printing hex string instead of binary ones in std_logic_vector versions of assert_(un)qual() procedures
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10 years ago |
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T. Meissner
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034b10cdc9
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change G_SCLK_DIVIDER range start to 6 (lowest working divider value) and adapt assertion to new range
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10 years ago |
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T. Meissner
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4acbb3c425
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using osvvm randompkg to randomize stimuli in SimT tests
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10 years ago |
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T. Meissner
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81ed8e8928
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moved deleting of vhdl-2008 packaged from clean to distclean target
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10 years ago |
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T. Meissner
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dfa69c148e
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replaced info about how to get VHDL-2008 packages by info about get_vhdl_2008.sh script
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10 years ago |
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T. Meissner
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d8f1bf228c
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fixed fileendings of VHDL-2008 packages
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10 years ago |
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T. Meissner
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79cc8ce4b3
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add script to download VHDL-2008 proposed packages & patch file for env_c.vhdl to get it compiled by GHDL
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10 years ago |
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T. Meissner
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595cee0200
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fixed location of vhdl 2008 package files
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10 years ago |
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T. Meissner
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db5dfc76b0
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fixed broken test for t_list_queue (data width mismatch)
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10 years ago |
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T. Meissner
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78f833a577
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add infos about OSVVM library
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10 years ago |
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T. Meissner
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9af05ea4af
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better comments, add report when wait_cycles() test finished
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10 years ago |
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T. Meissner
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0b3faa2877
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using v_count instead of null check for look if queue is empty
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10 years ago |
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T. Meissner
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592893ab2b
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add version 2.1 of OSVVM library; using osvvm randompkg to randomize stimuli in SpiT tests
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10 years ago |
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T. Meissner
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54168ab07e
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removed, using string function of VHDL-08 instead
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10 years ago |
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T. Meissner
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3dd69f2d16
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fixed stopping of clock when all tests are done
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10 years ago |
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T. Meissner
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cd72e16a7e
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removed forgotten references to deleted StringP.vhd package
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10 years ago |
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T. Meissner
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f1de455fd4
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fixed wrong period parameter usage in spi_master() procedure
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10 years ago |
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T. Meissner
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76f15e8c76
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integrate VHDL-08 libraries
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10 years ago |
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T. Meissner
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74675aa698
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removed, using the VHDL-2008 string functions instead
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10 years ago |
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T. Meissner
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5dd42b80a2
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add synthesizable and configurable SPI master component and enhance unit test
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10 years ago |
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T. Meissner
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dc24fc93b1
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fixed reset initialisation of s_sclk_d
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10 years ago |
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T. Meissner
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d12f791556
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beautify
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10 years ago |
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T. Meissner
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502aec376a
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replaced direct read from async SpiMosi_i input by read from registered a_mosi
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10 years ago |
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T. Meissner
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308e33cd0c
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synthesis don't like the std_logic'val(int) construct, change to if/else instead
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10 years ago |
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T. Meissner
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5e7db54e8f
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add implementation results for SpiSlave component
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10 years ago |
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T. Meissner
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a6169f1cdb
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Merge branch 'master' of https://github.com/tmeissner/libvhdl
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10 years ago |
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T. Meissner
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c9fc7388c9
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add synthesizable configurable SPI slave component and unit test
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10 years ago |
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T. Meissner
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ac5925c717
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add synthesizable configurable SPI slave component and unit test
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10 years ago |
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T. Meissner
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2b34512dec
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clean up assert_* procedures, add new optional parameter for severity level
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10 years ago |
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T. Meissner
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389b3470f1
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add cpha parameter do spi_master & spi_slave; change unit test to check all combinations of cpol & cpha
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10 years ago |
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T. Meissner
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10462234cc
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more and besset comments
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10 years ago |
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T. Meissner
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b4e6625524
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beautifying
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10 years ago |
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T. Meissner
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61baa0ff9a
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add information about new AssertP and SimP package components and tests
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10 years ago |
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T. Meissner
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58478fa5f0
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add new SimP package with various general useful testbench procedures like spi master & slave
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10 years ago |
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T. Meissner
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990a511776
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compile all packages in library 'libvhdl' now & use the library in the testbenches
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10 years ago |
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T. Meissner
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e70325aa62
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use new overloaded procedures with added report string parameter
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10 years ago |
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T. Meissner
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31bc032b82
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add overloaded versions of all assert procedures with report string parameter added
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10 years ago |
