181 Commits (42a5eb9b1b6645285c9f45dbd401c32aaa134aab)
 

Author SHA1 Message Date
  Torsten Meissner 5fde3ac4a7 added outdex to wave view 12 years ago
  Torsten Meissner 5e6c183533 moved vhdl testbench files into separate directory vhdl under sim 12 years ago
  Torsten Meissner 3c878ff054 moved vhdl testbench files into separate directory vhdl under sim 12 years ago
  Torsten Meissner 3399288adc change lib path for simulation 12 years ago
  Torsten Meissner 6c161223d9 moved vhdl testbench files into separate directory vhdl under sim 12 years ago
  Torsten Meissner 8f2e24fb8c new verilog testbench, makefile & tcl-file 12 years ago
  Torsten Meissner 804a359af4 new synchronous process for mode & valid signals 12 years ago
  Torsten Meissner e1900a3e28 all necessary functions are complete now 12 years ago
  Torsten Meissner 69c7fe92f9 added functions s1 - s8 12 years ago
  Torsten Meissner c1f59849e5 initial release of des function package in verilog 12 years ago
  Torsten Meissner 93186c5d1c initial release of des verilog implementation, framework code only at the moment 12 years ago
  Torsten Meissner 7bfc136dda Revert "dasdsad" 12 years ago
  Torsten Meissner 3deaf4829c Merge branch 'master' of https://github.com/tmeissner/cryptocores 12 years ago
  Torsten Meissner 4b41ea24dd dasdsad 12 years ago
  Torsten Meissner 1be72c73b6 Revert "New verily top level file of DES algorithm" 12 years ago
  Torsten Meissner 3ff9e3e269 New verily top level file of DES algorithm 12 years ago
  Torsten Meissner 78db757f9d new verily version of ads, startup code only at the moment 12 years ago
  Torsten Meissner 455bcaa289 ovl standard enable, fixed minor bug in pkg 12 years ago
  Torsten Meissner 4f5b5a1830 move vhdl files into separate directories 12 years ago
  Torsten Meissner 0b1ef754eb Revert "move vhdl files into separate directory" 12 years ago
  Torsten Meissner fdc730de69 move vhdl files into separate directory 12 years ago
  Torsten Meissner 783633c8a0 move vhdl simulation files into correspondent subdirectory vhdl 12 years ago
  Torsten Meissner 6737c9bf49 partition design in ovl and not ovl enabled 12 years ago
  Torsten Meissner 52cf1fe606 move rtl *.vhd files to the subdirectory vhdl of rtl directory 12 years ago
  Torsten Meissner 2e948cf1aa divide rtl directory in 2 sub-directories: vhdl & verilog 12 years ago
  Torsten Meissner 4f926c5e88 new function 'mixcolumns' 12 years ago
  Torsten Meissner 1cd5fcca51 OVL support further integrated 12 years ago
  Torsten Meissner 114a4e1072 remove OVL support in older, finished & verified projects 12 years ago
  Torsten Meissner 8fd02d0844 you can now include the OVL library if you set the OVL_ENABLE flag to 1 12 years ago
  Torsten Meissner b003e5e419 you can now include the OVL library if you set the OVL_ENABLE flag to 1 12 years ago
  Torsten Meissner 6624df8974 new function invshiftrow 12 years ago
  Torsten Meissner 85be1daaf9 correct minor bug 12 years ago
  Torsten Meissner b3dde95682 new primitive function for multiplication in 8 bit galois field 12 years ago
  Torsten Meissner e1c4e19396 filled function shiftrow with functional content 12 years ago
  Torsten Meissner c3026a176f new function frame shift row, outcommented 12 years ago
  Torsten Meissner 00cd0eba79 new function 'sortdata' to put input vector into internal data matrix 12 years ago
  Torsten Meissner 25cf2bfb54 new functions: byte sub & invbytesub 12 years ago
  Torsten Meissner ba30457fbd new tcl-file to control gtkwave 12 years ago
  Torsten Meissner ac8f8eb529 integrated tcl-file into gtkwave starting parameters 12 years ago
  Torsten Meissner c5fa11fbef integrated tcl-file into gtkwave starting parameters 12 years ago
  Torsten Meissner fbd8c111f5 integrated tcl-file into gtkwave starting parameters 12 years ago
  Torsten Meissner 36aeb55a1c new tcl-file to control gtkwave 12 years ago
  Torsten Meissner 4aa2f20b5a added array constants for forward & reverse s-boxes 13 years ago
  Torsten Meissner 42d69ab72f Initial release, pre-alpha state, only framework code 13 years ago
  Torsten Meissner 2e7c021255 initial release of tdes in cbc mode 13 years ago
  Torsten Meissner 4b8ab0d0cc added async reset to des-module to avoid simulation warnings and unititialized ports 13 years ago
  Torsten Meissner d3314a7d46 minor updates 13 years ago
  Torsten Meissner e1c9cb244b fixed some bugs with the key suppliment 13 years ago
  Torsten Meissner aec8130bdc some minor bugfixes 13 years ago
  Torsten Meissner a288199209 initial release of testbench and makefile 13 years ago