T. Meissner
e3e993fe4b
Add Makefile for synthesis of CBCTDES
4 years ago
T. Meissner
579eab1bf0
removed internal synced copy of reset_i; set ready to high in reset
11 years ago
T. Meissner
de08e53153
removed internal synced copy of reset_i; set ready to high in reset
11 years ago
T. Meissner
4b1f3d11f9
removed internal synced copy of reset_i; set ready to high in reset
11 years ago
T. Meissner
a91d55740a
wait for rising edge of s_reset before send stimuli data
11 years ago
T. Meissner
2a2aa23e21
wait for rising edge of reset before send stimuli data
11 years ago
T. Meissner
a89d5ba3d8
moved array type definitions out of functions to head of package, instances now also in package head and are constants
11 years ago
T. Meissner
f8226943a3
changed reset & clk timing according to vhdl testbench
11 years ago
T. Meissner
e62c0d5916
added verilog simulation environment
11 years ago
T. Meissner
3afaaaf4b2
finished conversion of vhdl design into verilog
11 years ago
Torsten Meißner
f7eb3587cf
adapted paths
11 years ago
T. Meissner
7105d21c74
iunitial commit os cbctdes verilog sources
12 years ago
T. Meissner
67fdd7e63b
moved in seperate directory 'vhdl'
12 years ago
T. Meissner
20f0baca10
moved in seperate directory 'vhdl'
12 years ago
Torsten Meissner
114a4e1072
remove OVL support in older, finished & verified projects
13 years ago
Torsten Meissner
8fd02d0844
you can now include the OVL library if you set the OVL_ENABLE flag to 1
- new variable OVL_ENABLE to enable OVL compile
- new variables OVL_LOC & OVL_SRC which point to the OVL library files
- new GHDL analyze of the OVL library
13 years ago
Torsten Meissner
c5fa11fbef
integrated tcl-file into gtkwave starting parameters
13 years ago
Torsten Meissner
2e7c021255
initial release of tdes in cbc mode
13 years ago