T. Meissner
2d708cbb51
Minor update to TDES sim makefile and testbench
4 years ago
T. Meissner
a2c530928e
Add more VHDL-synthesis Makefiles; use src of des instead of local copies; minor refactoring
4 years ago
T. Meissner
1850e5c1e3
Add Makefiles for VHDL synthesis of DES & TDES
4 years ago
T. Meissner
1d858ce952
added removing of tb_tdes binary and *.o files in clean target
11 years ago
T. Meissner
258e9db1e4
removed internal synced copy of reset; set ready to high in reset
11 years ago
T. Meissner
fa93856e07
removed internal synced copy of reset; set ready to high in reset
11 years ago
T. Meissner
dafb56c966
added wait for disactivated reset before running testcases
11 years ago
T. Meissner
5c74abc86f
added wait for disactivated reset before running testcases
11 years ago
T. Meissner
6c705cf64b
moved array type definitions out of functions to head of package, instances now also in package head and are constants
11 years ago
T. Meissner
e8aff41e6e
bugfixes to make tdes.v core working correctly
12 years ago
T. Meissner
5fff1d89d1
initial commit of verilog simulation environment for tdes core
12 years ago
T. Meissner
e2225fbbc9
initial commit os TDES verilog design file
12 years ago
T. Meissner
45403f17d1
import of des verilog design files
12 years ago
T. Meissner
dd979b5cd3
adapt makefile to new directory structure; new variable SRC_FILES for vhdl sources
12 years ago
T. Meissner
715b8b1229
beauty care
12 years ago
T. Meissner
30a7af4830
moved into seperate vhdl folder
12 years ago
T. Meissner
5e422923cf
moved into seperate vhdl folder
12 years ago
T. Meissner
d779f5aebe
moved into seperate vhdl folder
12 years ago
T. Meissner
7822728a74
moved into seperate vhdl folder
12 years ago
Torsten Meissner
114a4e1072
remove OVL support in older, finished & verified projects
13 years ago
Torsten Meissner
8fd02d0844
you can now include the OVL library if you set the OVL_ENABLE flag to 1
- new variable OVL_ENABLE to enable OVL compile
- new variables OVL_LOC & OVL_SRC which point to the OVL library files
- new GHDL analyze of the OVL library
13 years ago
Torsten Meissner
c5fa11fbef
integrated tcl-file into gtkwave starting parameters
13 years ago
Torsten Meissner
4b8ab0d0cc
added async reset to des-module to avoid simulation warnings and unititialized ports
13 years ago
Torsten Meissner
d3314a7d46
minor updates
13 years ago
Torsten Meissner
e1c9cb244b
fixed some bugs with the key suppliment
13 years ago
Torsten Meissner
aec8130bdc
some minor bugfixes
13 years ago
Torsten Meissner
a288199209
initial release of testbench and makefile
13 years ago
Torsten Meissner
25f37f7d9e
Revision 0.1 2011/10/08
Initial release of TDES according to FIPS 46-3 specification
13 years ago
Torsten Meissner
2a0a9348f3
Revision 0.1 2011/10/08
Initial release of TDES according to FIPS 46-3 specification
13 years ago