34 Commits (master)
 

Author SHA1 Message Date
  T. Meissner 51707e3177 Remove files added by mistake 3 months ago
  T. Meissner dd32a55377 Better hex conversion 3 months ago
  T. Meissner eecdbafe83 Also clean in cleanall target 3 months ago
  T. Meissner ee82cb5f44 Add .ruff_cache and __pycache__ to gitignore 3 months ago
  T. Meissner afc12ee9d0 Fix target order 3 months ago
  T. Meissner a370bfa701 Code reformatted by ruff 3 months ago
  T. Meissner ec50ef00fa Replace * imports by selective ones 3 months ago
  T. Meissner 3c556036c6 New targets for linting and formatting using ruff 3 months ago
  T. Meissner f7d6238731 Add AES test which uses pyuvm 3 months ago
  T. Meissner 86b76548e8 Add support to use NVC for simulation 4 months ago
  T. Meissner 80fb3ed2bb Add pyuvm as git submodule 4 months ago
  T. Meissner 4a0c9dc42b
Merge pull request #1 from cmarqu/patch-1 2 years ago
  Colin Marquardt 6609bfecc9
Typofixes 2 years ago
  T. Meissner 6b884bf859 Remove call of env-setup.sh 2 years ago
  T. Meissner 13c863eb5f Increase number of tests; adjust const. random generation 2 years ago
  T. Meissner ec2b3b108b Add presentation 'using python for verif. of dig. systems' 2 years ago
  T. Meissner 201ac4c6c2 Use pypi version since wallento/cocotbext-wishbone#22 was fixed 2 years ago
  T. Meissner d032d83d63 Remove non-needed imports & ReadOnly() calls 2 years ago
  T. Meissner e79d6f2533 Add directory change in log 2 years ago
  T. Meissner d4437740d5 Add GTKwave tcl file for uarttx 2 years ago
  T. Meissner 0fcdc7fbed Incorporate latest additions & fixes 2 years ago
  T. Meissner 7c3adb4be3 Beauty care 2 years ago
  T. Meissner d0a00d2619 Add --recursive in the log 2 years ago
  T. Meissner 1ebfafd654 Switch to submodule repos instead of local clones 2 years ago
  T. Meissner 92a387bf22 Added libvhdl & cryptocores as git submodules 2 years ago
  T. Meissner e13b23f27b Add aes and condense log in readme 2 years ago
  T. Meissner 3f97ee4f30 Add simple example verifying an aes unit 2 years ago
  T. Meissner f42ca7250a Separate uart tx & rx tests into own testbenches 2 years ago
  T. Meissner c3ae295a11 Better formatting of sram monitor output log 2 years ago
  T. Meissner 1c83d938ea Sram monitor: Fix latching of address in read transaction; store binaryvalue objects instead of strings 2 years ago
  T. Meissner f656244c55 Add simple example verifying a wishbone slave 2 years ago
  T. Meissner 3028207d24 Add docker setup step in quickstart section 2 years ago
  T. Meissner 3f5d65993f Add readme; outcomment installing wishbone extension 2 years ago
  T. Meissner f49a46399a initial commit of 1st simple UART tests 2 years ago