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cryptocores
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45 Commits (e3e993fe4b1c12b002a11a871e4e5f89dab2df67)

Author SHA1 Message Date
  T. Meissner 8f575798ea add .PHONY to clean target 10 years ago
  T. Meissner 3531c69ce1 add support for ITER & PIPE variations of DES verilog implementation 10 years ago
  T. Meissner cb14f089b9 add acceptin & acceptout ports 10 years ago
  T. Meissner 393757693e add removing of testbench binary to clean target 10 years ago
  T. Meissner 82ae83f1dc adapted to ITER & PIPE configuration, supports now both settings 10 years ago
  T. Meissner af8fe6023d add accept signals to waveform view 10 years ago
  T. Meissner cfd20a9bbc add removing of object files to clean target 10 years ago
  T. Meissner e9cd57264b changed option 'T' to 'S' 11 years ago
  T. Meissner 734efbc59f added test cases for decryption in stimuli & checker; bugfix wwith validout detection 12 years ago
  T. Meissner fc78527665 added test data for decryption test cases 12 years ago
  T. Meissner fd799eeed1 change in error message 12 years ago
  T. Meissner 9a340f5524 added timescale directive and set it to 1 ns/1 ps 12 years ago
  T. Meissner bd2f313431 removed 'outdex' reg from waveform viewer 12 years ago
  T. Meissner e40682386a testbench enhancement 12 years ago
  T. Meissner 10bcd87d1b dependency files now moved into 2 variables SRC_FILES & SIM_FILES 12 years ago
  T. Meissner 28542ea65b new verification data files key_input.txt & data_output.txt 12 years ago
  T. Meissner 6c9a4f1c2b stimuli.txt moved to data_input.txt 12 years ago
  Torsten Meissner dd01604dc0 data for stimuli / checker data 13 years ago
  Torsten Meissner 9a29954670 new stimuli, checker & reset processes 13 years ago
  Torsten Meissner 5fde3ac4a7 added outdex to wave view 13 years ago
  Torsten Meissner 5e6c183533 moved vhdl testbench files into separate directory vhdl under sim 13 years ago
  Torsten Meissner 3c878ff054 moved vhdl testbench files into separate directory vhdl under sim 13 years ago
  Torsten Meissner 6c161223d9 moved vhdl testbench files into separate directory vhdl under sim 13 years ago
  Torsten Meissner 8f2e24fb8c new verilog testbench, makefile & tcl-file 13 years ago
  Torsten Meissner 114a4e1072 remove OVL support in older, finished & verified projects 13 years ago
  Torsten Meissner b003e5e419 you can now include the OVL library if you set the OVL_ENABLE flag to 1 13 years ago
  Torsten Meissner fbd8c111f5 integrated tcl-file into gtkwave starting parameters 13 years ago
  Torsten Meissner 36aeb55a1c new tcl-file to control gtkwave 13 years ago
  Torsten Meissner 4b8ab0d0cc added async reset to des-module to avoid simulation warnings and unititialized ports 13 years ago
  Torsten Meissner 12bc2b697e I mean the test vases in NIST document 800-17 ;-) 13 years ago
  Torsten Meissner e32dae12f1 Revision 1.1 2011/09/18 13 years ago
  Torsten Meissner 0feb33c308 extended simulation time to 11 us 13 years ago
  Torsten Meissner ce9571eea6 array signals replaced by constants 13 years ago
  Torsten Meissner a08763c2a0 new test case: Substitution table known answer test - encryption 13 years ago
  Torsten Meissner efacbab6d2 new test case: permutation operation known answer test - encryption 13 years ago
  Torsten Meissner 9ff075be14 Revision 1.0.2 2011/09/18 13 years ago
  Torsten Meissner b08ff1f872 set assertion level for ghdl to 'error', expanded simulation time to 7us 13 years ago
  Torsten Meissner 091efc0f85 correct bug in enc / dec test key, test works successfully now 13 years ago
  Torsten Meissner e1980efa74 longer simulation time 13 years ago
  Torsten Meissner 248f3e62d8 partial adapted on tests according nist 800-17 publication 13 years ago
  Torsten Meissner 4b59f1b69d adapted on the initial release of the testbench 13 years ago
  Torsten Meissner 75efc1f03f initial release of testbench for des 13 years ago
  Torsten Meissner cc9989e997 makefile for simulation environment, needs ghdl and gtkwave to work 13 years ago
  Torsten Meissner e180a6a327 1st draft of testbench for the des, must be completed 13 years ago