96 Commits (e3a6fd38ab75d0a5dd57a23fa0ca5102772dff9b)
 

Author SHA1 Message Date
  T. Meissner e3a6fd38ab Add issue code for ghdl/ghdl#1658 3 years ago
  T. Meissner b100e2612f Add issue code for ghdl/ghdl#1654 3 years ago
  T. Meissner d67333231a Add example for PSL abort operator 3 years ago
  T. Meissner cb8a45dee9 Remove sublime text project files 3 years ago
  T. Meissner 4180e5a66f Add onehot & onehot0 examples to formal tests 3 years ago
  T. Meissner 8b4086dedb Add examples for onehot() & onehot0() PSL functions 3 years ago
  T. Meissner 333c6f8c16 Add example for PSL endpoints (currently simulation only) 3 years ago
  T. Meissner ee9cda7463 Add examples for formal attributes anyconst & anyseq 3 years ago
  T. Meissner d03b07f2dc Update infos about recommended docker images 3 years ago
  T. Meissner 43e3b45f8b Include issue_1591 in tests as ghdl/ghdl#1591 was fixed 3 years ago
  T. Meissner 1acd5e3d6c Add issue code for ghdl/ghdl#1591 3 years ago
  T. Meissner 61d719defa Add for, forall & macros to unsupported list 4 years ago
  T. Meissner 29ff43dcb2 Add example for named properties 4 years ago
  T. Meissner ddeb7e1f72 Add example for named sequences 4 years ago
  T. Meissner ed005f68d6 Add issue code for PSL endpoints used in inline mode (ghdl/ghdl#1378) 4 years ago
  T. Meissner 5e23ba9171 Add example for PSL verification units (vunit) 4 years ago
  T. Meissner ab97e79926 Add example for log iff (<->) operator, was fixed in ghdl/ghdl#1371 4 years ago
  T. Meissner 53b5fcdf6f generate constructs in PSL vunits fixed (ghdl/ghdl#1372) 4 years ago
  T. Meissner 74b3bda2de Remove unused code from issue_1372 4 years ago
  T. Meissner a3f073aac3 Add sublime test project file to gitignore file 4 years ago
  T. Meissner 9462cbd262 Add issue code for if-generate in PSL vunits (ghdl/ghdl#1372) 4 years ago
  T. Meissner 09fab71a50 Update prev() & stable() examples after ghdl/ghdl#1366 & ghdl/ghdl#1367 were fixed 4 years ago
  T. Meissner b3a8140484 Add sublime text project file 4 years ago
  T. Meissner 56a752114d Add issue code for VHDL code in PSL vunits (ghdl/ghdl#1367) 4 years ago
  T. Meissner 4855f86215 Add issue code for VHDL code in PSL vunits (ghdl/ghdl#1366) 4 years ago
  T. Meissner 2cec27d081 Add fell() example to formal tests after it was implemented by ghdl/ghdl#1357 4 years ago
  T. Meissner 6ccf3095ee Add rose() example to formal tests after it was implemented by ghdl/ghdl#1356 4 years ago
  T. Meissner cbd80e413c Add stable() example to formal tests after it was implemented by ghdl/ghdl#1353 4 years ago
  T. Meissner b018d2e608 Add examples for currently unsupported rose(), fell() & stable() PSL functions 4 years ago
  T. Meissner 521faf5414 Add example for SERE concatenation (;) operator 4 years ago
  T. Meissner 0d5101ee50 Add example for SERE fusion (:) operator 4 years ago
  T. Meissner 4a2605e664 Add example for SERE non-length-matching and (&) operator 4 years ago
  T. Meissner d904d45c9b Add some examples using prev() with vectors 4 years ago
  T. Meissner 7a8545857b Add examples using prev() with 2nd parameter) 4 years ago
  T. Meissner 12cb822424 Add example for prev() function 4 years ago
  T. Meissner 1f300d621a Add code for issue ghdl/ghdl#1347 4 years ago
  T. Meissner 0aa92b4d4f Include eventually example in formal tests after ghdl/ghdl#1345 was fixed 4 years ago
  T. Meissner be1410b625 stop_sim(): Use add_cycles parameter instead of hard coded value 4 years ago
  T. Meissner 413737fdf1 Update badges for GHA workflows 4 years ago
  T. Meissner 814b3fc257 Add GHA workflow for simulation tests 4 years ago
  T. Meissner a5afca8752 Exclude crashing eventually example from formal tests 4 years ago
  T. Meissner 1b7df83ee2 Add sim/work to gitignore file 4 years ago
  T. Meissner 0d4d165419 Stop simulation after a given number of cycles instead of time 4 years ago
  T. Meissner 4308f7d966 Add simulation of the PSL examples, fixes #1 4 years ago
  T. Meissner 4815ad4a01 Add issue code for eventually! operator (ghdl/ghdl#1345) 4 years ago
  T. Meissner 9b34289045 Add example for SERE length mathcing and (&&) operator 4 years ago
  T. Meissner cee1bcf8aa Add another assertion to the SERE or example 4 years ago
  T. Meissner eaf03a8be8 Add example for SERE or (|) operator 4 years ago
  T. Meissner 356f6a1678 Add example for SERE within operator 4 years ago
  T. Meissner 4dd0f1b33c Fixed assertion - combining SEREs isn't trivial ;) 4 years ago